1. Field of Invention
The present invention relates to a method of fabricating a thin film transistor liquid crystal display (TFT-LCD). More particularly, the present invention relates to a method of controlling the capacitance of a TFT-LCD storage capacitor.
2. Description of Related Art
Liquid crystal display (LCD) has many advantages over other conventional types of displays including high display quality, small volume occupation, lightweight, low voltage driven and low power consumption. Hence, LCDs are widely used in small portable televisions, mobile telephones, video recording units, notebook computers, desktop monitors, projector televisions and so on. Therefore, LCD has gradually replaced the conventional cathode ray tube (CRT) as a mainstream display unit.
The gate dielectric layer of the thin film transistor in the TFT-LCD is generally a silicon nitride layer. When a source/drain stacked layer in a bottom gate structure or a gate in a top gate structure is formed on the gate dielectric layer, a short period of over-etching is performed to make sure that no residues are left on the gate dielectric layer. Since the area of the transparent substrate is very large, the thickness uniformity of the gate dielectric layer after over-etching on the entire transparent substrate is not good. Thus, the thickness uniformity of the storage capacitor dielectric layer in each pixel is also affected.
The storage electricity of the storage capacitor is used to compensate for the leakage current of the pixel electrode, and the pixel electrode voltage can therefore be maintained at a stable level to stabilize the arrangement of liquid crystal molecules to stabilize the display of LCD. If the capacitances of the capacitors on the transparent substrate are varied, the charging or discharging rates are also varied. Therefore, the TFT dimensions cannot be designed according to the ideal condition that each storage capacitor has the same capacitance. To insure that a storage capacitor with less sufficient capacitance can normally charge and discharge in a regular time period, the TFT dimensions have to be designed large enough to enable the poorest storage capacitor to function normally. Therefore, the stability of the TFT-LCD display can be maintained. However, the aperture ratio of each pixel in TFT-LCD is decreased.
It is therefore an objective of the present invention to provide a method of controlling the capacitance of the TFT-LCD storage capacitor to control the uniformity of the storage capacitor""s dielectric layer.
It is another objective of the present invention to provide a method of controlling the capacitance of the TFT-LCD storage capacitor to improve the uniformity of the storage capacitor""s capacitance.
It is still another objective of the present invention to provide a method of controlling the capacitance of the TFT-LCD storage capacitor to reduce TFTs"" dimensions.
It is again another objective of the present invention to provide a method of controlling the capacitance of the TFT-LCD storage capacitor to elevate the aperture ratio of the liquid crystal display.
In accordance with the foregoing and other objectives of the present invention, a method of controlling the capacitance of the TFT-LCD storage capacitor is provided. The method comprises the following steps. A first conductive layer is formed on a transparent substrate and then is patterned to form a gate and a bottom electrode. A first silicon nitride layer, a dielectric layer, a second silicon nitride layer, an undoped amorphous silicon layer, and a doped amorphous silicon layer are sequentially formed on the transparent substrate, and an etching selectivity ratio of amorphous silicon over a material of the dielectric layer is not less than about 5.0. The doped amorphous silicon layer, the undoped amorphous silicon layer, and the second silicon nitride layer are patterned to form a stacked layer on the dielectric layer over the gate. A second conductive layer is formed on the transparent substrate. Then, the second conductive layer and the doped amorphous silicon layer are patterned to form a source and a drain on either side of the gate. Next, a passivation layer is formed over the transparent substrate and then is patterned to form a contact window to expose the source or the drain. A transparent conductive layer is formed on the passivation layer and in the contact window. The transparent conductive layer then is patterned to form a pixel electrode to connect the exposed source or the drain through the contact window electrically, and a storage capacitor is formed by the overlap between the pixel electrode and the bottom electrode.
In accordance with the foregoing and other objectives of the present invention, another method of controlling the capacitance of the TFT-LCD storage capacitor is provided. The method comprises the following steps. A first conductive layer is formed on a transparent substrate and then is patterned to form a gate and a bottom electrode on the transparent substrate. A first silicon nitride layer, a dielectric layer, a second silicon nitride layer, an undoped amorphous silicon layer, and an etching stop layer are sequentially formed on the transparent substrate, and an etching selectivity ratio of amorphous silicon over a material of the dielectric layer is not less than about 5.0. The etching stop layer is patterned to form an etching mask on the undoped amorphous silicon layer over the gate. A doped amorphous silicon layer and a second conductive layer are sequentially formed over the transparent substrate. Then, the second conductive layer, the doped amorphous silicon layer, the undoped amorphous silicon layer, and the second silicon nitride layer are sequentially patterned to form a source and a drain on either side of the gate, and the undoped amorphous silicon layer serves as a channel between the source and the drain. A passivation layer is formed over the transparent substrate and then is patterned to form a contact window therein to expose the source or the drain. A transparent conductive layer is formed on the passivation layer and in the contact window. Then, the transparent conductive layer is patterned to form a pixel electrode to connect the exposed source or drain electrically through the contact window, and a storage capacitor is formed by the overlap between the pixel electrode and the bottom electrode.
In accordance with the foregoing and other objectives of the present invention, still another method of controlling the capacitance of the TFT-LCD storage capacitor is provided. The method comprises the following steps. An undoped amorphous silicon layer is formed on a transparent substrate and then is patterned to form a silicon island of the TFT and a bottom electrode of the storage capacitor on the transparent substrate. A first silicon nitride layer, a dielectric layer, a second silicon nitride layer, and a first conductive layer are sequentially formed on the transparent substrate, and an etching selectivity ratio of amorphous silicon over a material of the dielectric layer is not less than about 5.0. Then, the first conductive layer and the second silicon nitride layer are patterned to form a stacked layer on the central part of the silicon island, and the first conductive layer of the stacked layer serves as a gate of a thin film transistor. The gate is used as a mask to implant ions into the silicon island under both sides of the gate to form a source and a drain of the thin film transistor and implant ions into the bottom electrode. A passivation layer is formed over the transparent substrate. The passivation layer, the dielectric layer and the first silicon nitride layer then are patterned to form a first contact window to expose the source and a second contact window to expose the drain. A second conductive layer is formed over the transparent substrate and then is patterned to form a data line connecting the source through the first contact window. A transparent conductive layer is formed over the transparent substrate. The transparent conductive layer is patterned to form a pixel electrode connecting the drain through the second contact window, and a storage capacitor is formed by the overlap between the pixel electrode and the bottom electrode.
In the foregoing, the dielectric layer is, for example, a silicon oxide layer, a tantalum oxide layer, an aluminum oxide layer or a barium titanate layer.
In conclusion, the invention allows the dielectric layer to be an etch stop layer when the stacked layer is formed, and the remaining dielectric layer and the first silicon nitride layer thus have a uniform thickness. Therefore, the storage capacitor, which comprises overlapping parts of the bottom electrode, the first silicon nitride layer, the dielectric layer, the passivation layer and the pixel electrode, has a uniform dielectric layer, which comprises the first silicon nitride layer, the dielectric layer, and the passivation layer. As a result, the capacitance of the storage capacitor is also uniform to allow a smaller dimension of the thin film transistor. Hence, the aperture ratio of each pixel is increased to improve the display quality.
It is to be understood that both the foregoing general description and the following detailed description are by examples, and are intended to provide further explanation of the invention as claimed.